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ARD2
1.00 for Rev B. Hardware
Airbag Reference Demonstrator using MPC5604P
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ADC drivers for MPC5604P. More...
Go to the source code of this file.
Data Structures | |
| union | ADCConfig_t |
| union | ADCChConfig_t |
Defines | |
| #define | TRUE (1u) |
| #define | CLEAR (0u) |
| #define | BITS_IN_NIBBLE (4u) |
| #define | BITS_IN_BYTE (8u) |
| #define | BYTES_IN_16 (2u) |
| #define | BYTES_IN_32 (4u) |
| #define | BITS_IN_32 (32u) |
| #define | BITS_IN_16 (16u) |
| #define | BIT_DEFINITION |
| #define | BIT0 (1u << 0u) |
| #define | BIT1 (1u << 1u) |
| #define | BIT2 (1u << 2u) |
| #define | BIT3 (1u << 3u) |
| #define | BIT4 (1u << 4u) |
| #define | BIT5 (1u << 5u) |
| #define | BIT6 (1u << 6u) |
| #define | BIT7 (1u << 7u) |
| #define | BIT8 (1u << 8u) |
| #define | BIT9 (1u << 9u) |
| #define | BIT10 (1u << 10) |
| #define | BIT11 (1u << 11) |
| #define | BIT12 (1u << 12) |
| #define | BIT13 (1u << 13) |
| #define | BIT14 (1u << 14) |
| #define | BIT15 (1u << 15) |
| #define | BIT16 (1u << 16) |
| #define | BIT17 (1u << 17) |
| #define | BIT18 (1u << 18) |
| #define | BIT19 (1u << 19) |
| #define | BIT20 (1u << 20) |
| #define | BIT21 (1u << 21) |
| #define | BIT22 (1u << 22) |
| #define | BIT23 (1u << 23) |
| #define | BIT24 (1u << 24) |
| #define | BIT25 (1u << 25) |
| #define | BIT26 (1u << 26) |
| #define | BIT27 (1u << 27) |
| #define | BIT28 (1u << 28) |
| #define | BIT29 (1u << 29) |
| #define | BIT30 (1u << 30) |
| #define | BIT31 (1u << 31) |
| #define | ADC_MODULE_0 (0x00u) |
| #define | ADC_MODULE_1 (0x01u) |
| #define | ADC_CH_MAX ADC_CH15 |
| #define | ADC_NO_MODULES (0x02u) |
| #define | ADC_ST_IDLE (0x00u) |
| #define | ADC_ST_POWER_DOWN (0x01u) |
| #define | ADC_ST_WAIT (0x02u) |
| #define | ADC_ST_SAMPLE (0x04u) |
| #define | ADC_ST_CONVERSION (0x06u) |
| #define | ADC_ISR_EOCTU_MASK BIT4 |
| #define | ADC_ISR_JEOC_MASK BIT3 |
| #define | ADC_ISR_JECH_MASK BIT2 |
| #define | ADC_ISR_EOC_MASK BIT1 |
| #define | ADC_ISR_ECH_MASK BIT0 |
| #define | ADC_ERR_BAD_INSTANCE BIT0 |
| #define | ADC_ERR_INVALID_RESULT BIT1 |
| #define | ADC_ERR_INVALID_CH BIT2 |
| #define | ADC_ERR_ONGOING_CONV BIT3 |
| #define | ADC_DATA_CAN_BE_OVERWRITTEN (0x80000000u) |
| #define | ADC_DATA_CANT_BE_OVERWRITTEN (0X00000000u) |
| #define | ADC_DATA_IS_ALIGNED_LEFT (0x40000000u) |
| #define | ADC_DATA_IS_ALIGNED_RIGHT (0x00000000u) |
| #define | ADC_IS_IN_SCAN_MODE (0x20000000u) |
| #define | ADC_IS_IN_ONE_SHOT_MODE (0x00000000u) |
| #define | ADC_CTU_IS_ON (0x10000000u) |
| #define | ADC_CTU_IS_OFF (0x00000000u) |
| #define | ADC_AUTOCLOCK_OFF_EN (0x08000000u) |
| #define | ADC_AUTOCLOCK_OFF_DIS (0x00000000u) |
| #define | ADC_EO_CTU_CONV_ISR_EN (0x04000000u) |
| #define | ADC_EO_CTU_CONV_ISR_DIS (0x00000000u) |
| #define | ADC_EO_INJ_CHAN_CONV_ISR_EN (0x02000000u) |
| #define | ADC_EO_INJ_CHAN_CONV_ISR_DIS (0x00000000u) |
| #define | ADC_EO_INJ_CHAIN_CONV_ISR_EN (0x01000000u) |
| #define | ADC_EO_INJ_CHAIN_CONV_ISR_DIS (0x00000000u) |
| #define | ADC_EO_CHAN_CONV_ISR_EN (0x00800000u) |
| #define | ADC_EO_CHAN_CONV_ISR_DIS (0x00000000u) |
| #define | ADC_EO_CHAIN_CONV_ISR_EN (0x00400000u) |
| #define | ADC_EO_CHAIN_CONV_ISR_DIS (0x00000000u) |
| #define | ADC_DMA_CLEARED_ON_READ (0x00200000u) |
| #define | ADC_DMA_CLEARED_ON_ACK (0x00000000u) |
| #define | ADC_DMA_EN (0x00100000u) |
| #define | ADC_DMA_DIS (0x00000000u) |
| #define | ADC_IS_CLOCKING_FULL_SPEED (0x00080000u) |
| #define | ADC_IS_CLOCKING_HALF_SPEED (0x00000000u) |
| #define | ADC_PR_INPLATCH_SET (0x00008000u) |
| #define | ADC_PR_INPLATCH_CLEAR (0x00000000u) |
| #define | ADC_PR_LSB_ROUND_DOWN (0x00004000u) |
| #define | ADC_PR_LSB_ROUND_UP (0x00002000u) |
| #define | ADC_PR_LSB_NO_ROUNDING (0x00000000u) |
| #define | ADC_PR_INPCMP_1 (0x00000200u) |
| #define | ADC_PR_INPCMP_2 (0x00000400u) |
| #define | ADC_PR_INPCMP_3 (0x00000600u) |
| #define | ADC_CH_ISR_EN (0x80000000u) |
| #define | ADC_CH_ISR_DIS (0x00000000u) |
| #define | ADC_CH_DMA_EN (0x40000000u) |
| #define | ADC_CH_DMA_DIS (0x00000000u) |
| #define | ADC_LOW_SPEED_CONFIG |
| #define | N_ELEMENTS(X) (sizeof(X)/sizeof(*(X))) |
| #define | ADC_PR_INPSAMP(XX) (XX << 16u) |
Typedefs | |
| typedef struct ADC_tag * | ADC_t |
Enumerations | |
| enum | ADC_CHANNELS { ADC_CH0 = 0u, ADC_CH1, ADC_CH2, ADC_CH3, ADC_CH4, ADC_CH5, ADC_CH6, ADC_CH7, ADC_CH8, ADC_CH9, ADC_CH10, ADC_CH11, ADC_CH12, ADC_CH13, ADC_CH14, ADC_CH15, ADC_CH16, ADC_CH17, ADC_CH18, ADC_CH19, ADC_CH20, ADC_CH21, ADC_CH22, ADC_CH23, ADC_CH24, ADC_CH25, ADC_CH26, ADC_CH27, ADC_CH28, ADC_CH29, ADC_CH30, ADC_CH31, ADC_CH32, ADC_CH33, ADC_CH34, ADC_CH35, ADC_CH36, ADC_CH37, ADC_CH38, ADC_CH39, ADC_CH40, ADC_CH41, ADC_CH42, ADC_CH43, ADC_CH44, ADC_CH45, ADC_CH46, ADC_CH47, ADC_CH48, ADC_CH49, ADC_CH50, ADC_CH51, ADC_CH52, ADC_CH53, ADC_CH54, ADC_CH55, ADC_CH56, ADC_CH57, ADC_CH58, ADC_CH59, ADC_CH60, ADC_CH61, ADC_CH62, ADC_CH63, ADC_CH64, ADC_CH65, ADC_CH66, ADC_CH67, ADC_CH68, ADC_CH69, ADC_CH70, ADC_CH71, ADC_CH72, ADC_CH73, ADC_CH74, ADC_CH75, ADC_CH76, ADC_CH77, ADC_CH78, ADC_CH79, ADC_CH80, ADC_CH81, ADC_CH82, ADC_CH83, ADC_CH84, ADC_CH85, ADC_CH86, ADC_CH87, ADC_CH88, ADC_CH89, ADC_CH90, ADC_CH91, ADC_CH92, ADC_CH93, ADC_CH94, ADC_CH95 } |
Functions | |
| uint8_t | u8fnADCConvert (const uint8_t cu8ADCInstance, const uint8_t cu8ADCCh, uint16_t *pu16Result) |
| Launches ADC to perform a conversion for a given channel. | |
| uint8_t | u8fnADCConfig (uint8_t u8Instance, ADCConfig_t *ptADCConfig) |
| Configures a particular instance for operation according to passed argument. | |
| uint8_t | u8fnADCChannelConfig (const ADCChConfig_t *tADCChConfig, const uint16_t *pu16Results) |
| Configures a particular channel for a programmed conversion. | |
| uint8_t | u8fnADCReadChannel (uint8_t u8Instance, uint8_t u8Channel, uint16_t *pu16ADCResult) |
| Performs exactly what it names suggests. | |
| uint8_t | u8fnADCStatus (uint8_t u8Instance) |
| Returns the HW status of an instance. | |
| uint8_t | u8fnADCNormalConversionEnable (uint8_t u8Instance, uint8_t u8Enable) |
| Starts a normal (scheduled) conversion. | |
| void | vfnADC0EoCIsr (void) |
| Channels an end of conversion isr from ADC0 into the general ADC end of conversion Isr with its proper argument. | |
| void | vfnADC1EoCIsr (void) |
| Channels an end of conversion isr from ADC1 into the general ADC end of conversion Isr with its proper argument. | |
| void | vfnADC0ErrIsr (void) |
| Channels a error isr from ADC0 into the general ADC error Isr with its proper argument. | |
| void | vfnADC1ErrIsr (void) |
| Channels a error isr from ADC1 into the general ADC error Isr with its proper argument. | |
| void | vfnADC0WatchDogIsr (void) |
| Channels a watchdog isr from ADC0 into the general ADC Watchdog Isr with its proper argument. | |
| void | vfnADC1WatchDogIsr (void) |
| Channels a watchdog isr from ADC1 into the general ADC Watchdog Isr with its proper argument. | |
ADC drivers for MPC5604P.
Copyright (c) 2011 Freescale Semiconductor Freescale Confidential Proprietary
History:
| #define ADC_ERR_BAD_INSTANCE BIT0 |
Error for an incorrect ADC instance
| #define ADC_ERR_INVALID_CH BIT2 |
Invalid ADC channel selected.
| #define ADC_ERR_INVALID_RESULT BIT1 |
Error for an ADC HW-flagged error in the result
| #define ADC_ERR_ONGOING_CONV BIT3 |
There's an ongoing conversion
| #define ADC_LOW_SPEED_CONFIG |
(ADC_PR_INPLATCH_SET | ADC_PR_INPCMP_3 | \
ADC_PR_INPSAMP(255u))
| uint8_t u8fnADCChannelConfig | ( | const ADCChConfig_t * | tADCChConfig, |
| const uint16_t * | pu16Results | ||
| ) |
Configures a particular channel for a programmed conversion.
| tADCChConfig,: | pointer to tADCChConfig with the correct instance and channel to configure |
| pu16Results,: | Where to place the result once it's ready. |
| uint8_t u8fnADCConfig | ( | uint8_t | u8Instance, |
| ADCConfig_t * | ptADCConfig | ||
| ) |
Configures a particular instance for operation according to passed argument.
| u8Instance,: | ADC instance to associate this fn to. |
| ptADCConfig,: | Configuration settings as described by ADCConfig_t |
| uint8_t u8fnADCConvert | ( | const uint8_t | cu8ADCInstance, |
| const uint8_t | cu8ADCCh, | ||
| uint16_t * | pu16Result | ||
| ) |
Launches ADC to perform a conversion for a given channel.
| cu8ADCInstance,: | ADC instance to associate this fn to. |
| cu8ADCCh,: | ADC channel for that particular instance. |
| pu16Result,: | 10-bit result of the conversion. |
| uint8_t u8fnADCNormalConversionEnable | ( | uint8_t | u8Instance, |
| uint8_t | u8Enable | ||
| ) |
Starts a normal (scheduled) conversion.
| u8Instance | Which ADC instance is going to be read. |
| u8Enable | zero for disable, non-zero for enable. |
| uint8_t u8fnADCReadChannel | ( | uint8_t | u8Instance, |
| uint8_t | u8Channel, | ||
| uint16_t * | pu16ADCResult | ||
| ) |
Performs exactly what it names suggests.
| u8Instance,: | Which ADC instance is going to be read. |
| u8Channel,: | Which channel is going to be read. |
| pu16ADCResult | Where the result will be placed. |
| uint8_t u8fnADCStatus | ( | uint8_t | u8Instance | ) |
Returns the HW status of an instance.
| u8Instance,: | Which ADC instance is going to be read. |
| void vfnADC0EoCIsr | ( | void | ) |
Channels an end of conversion isr from ADC0 into the general ADC end of conversion Isr with its proper argument.
| None |
| void vfnADC0ErrIsr | ( | void | ) |
Channels a error isr from ADC0 into the general ADC error Isr with its proper argument.
| u8Instance | ADC instance. |
| void vfnADC0WatchDogIsr | ( | void | ) |
Channels a watchdog isr from ADC0 into the general ADC Watchdog Isr with its proper argument.
| None |
| void vfnADC1EoCIsr | ( | void | ) |
Channels an end of conversion isr from ADC1 into the general ADC end of conversion Isr with its proper argument.
| None |
| void vfnADC1ErrIsr | ( | void | ) |
Channels a error isr from ADC1 into the general ADC error Isr with its proper argument.
| None |
| void vfnADC1WatchDogIsr | ( | void | ) |
Channels a watchdog isr from ADC1 into the general ADC Watchdog Isr with its proper argument.
| None |